2015 SW Test Workshop - Technical Program

Technical Tutorials

Session Chair : Jerry Broz, Ph.D. (SW Test General Chair)

Understanding RF Measurements Using Advanced Cantilever Technologies
- Paul O'Neil (aps Solutions GMbH - Munich, Germany
Reduce cost of wafer test with 3% to 10% by spending 10 minutes optimizing the wafer touchdown
- Andre Stoelwinder (PDF Solutions Inc. - San Jose, USA)

Keynote Presentation

Trends, Challenges, and Directions for Silicon Beyond 28nm that Drive Interconnect Development
- David McCann, Vice President of Packaging R+D and Operations
  GLOBALFOUNDRIES

Session #1 - Vertically Challenged

Session Chair : Jerry Broz, Ph.D. (SW Test General Chair)

Welcome to SW Test 2015!
- Jerry Broz, Ph.D. (SW Test General Chair)
Determining Probe's Maximum Allowable Current
- Jarek Kister and Amy Leong (FormFactor, USA)
- Amer Cassier (Qualcomm - San Diego,CA, USA)
Introduction of efficient design tools for vertical probe and innovative probe material Rhodeo6
- Tadashi Rokkaku (Probe Innovation, Inc. - Fuchu, Japan)
Challenges of next generation probing at ≤60 µm minimum pitch Full Arrays
- Raffaele Vallauri, Mr. Daniele Perego, Daniele Acconcia, and Marco Prea (Technoprobe S.p.A., Italy)

Session #2 - Lasers and Sensors

Session Chair : Joey Wu (MPI Corp - Taiwan)

High Throughput Laser Processing of Guide Plates for Vertical Probe Cards
- Rouzbeh Sarrafi, Dana Sercel, Sean Dennigan, Joshua Stearns, Cristian Porneala, Xiangyang Song, Joshua Schoenly, Mathew Hannon, Roy VanGemert, Heath Chaplin, Marco Mendes, Jeff Sercel (IPG Photonics - Microsystems - Manchester, USA)
Drilling Methods and Materials for Advanced Vertical Probe Cards
- Dr. Alan Ferguson, Dr. Andrew Kearsley, Dr. Martyn Knowles, Alun Michael, David Bruneel, Michael Gaukroger (Oxford Lasers Ltd. - Didcot, United Kingdom)
- Brian Coscia (OXFORD LASERS - Shirley, MA, USA)
"Smart sensors–smart probe cards" – Probing sensor devices requires stimulation with magnetic fields, infrared radiation or humidity
- Georg Franz and Dr. Rainer Gaggl (T.I.P.S. Messtechnik GmbH - Villach, Austria)

Session #3 - High Speed Testing - Challenges and Innovative Solutions

Session Chair : Karen Armendariz (Celadon Systems)

An innovative design and implement of vertical probe card for High Speed Loopback (12 Gbps) Application
- Morgan Ku, Alex Wei, Seenew Lai, Akey Chen, Anderson Huang, Steven Wu, Cahris Lin (MPI Corporation - Zhubei, Taiwan)
- Y.S. Kuo and Kenny Tang (TSMC Corporation - Hsinchu, Taiwan)
Blindmate RF Connector for E-Band Production Test
- Daniel Bock (Cascade Microtech - Beaverton, CA, USA)
Measurement of probe card RF performance using a probe card analyzer
- Paul O'Neil (aps Solutions GmbH - Munich, Germany)
- Oscar Beijert (BE Precision Technology - NL)

Session #4 - Panel Discussion

Session Chair : Michael Huebner (FormFactor, Inc.)

Panel Discussion

Session #5 - Probe Card Analytics (Predicative Modeling and Characterization)

Session Chair : Amy Leong (FormFactor, Inc.)

Probe Pin Wideband Electrical Circuit Model
- Mohamed Eldessouki (SV TCL - An SV Probe Company - Tempe, AZ, USA)
Experience in Applying Finite Element Analysis for Advanced Probe Card Design and Study
- Krzysztof Dabrowiecki and Jorg Behr (Feinmetall GmbH - Herrenberg, Germany)
Probe Tip and Probe Mark Analysis to Predict Effects on Wire Bonding
- Austin Doutre (Brigham Young University Idaho - Rexburg, ID, USA)
- Dr. Stevan Hunter (ON Semiconductor, ISU, and BYU-Idaho - Pocatello, ID, USA)
Measuring probe parameters through a circuit board
- Gert Hohenwarter, Ph.D. (GateWave Northern, Inc. - Madison, WI, USA)

Session #6 - Probe Potpourri

Session Chair : Rey Rincon (Freescale Semiconductor)

Are You Really Going to Package That?
- Ira Feldman and Debbora Ahlgren (Feldman Engineering Corp. - Lake Oswego, OR, USA)
High performance HBM Known Good Stack Testing
- Marc Loranger (Form Factor Inc - Livermore, CA, USA)
- John Oonk (Teradyne Inc - Agoura Hills, CA, USA)
WLP Probing Opportunity and Challenge
- Clark Liu (PTI - HsiChu, Taiwan)

Session #7 - Here is Something Different...

Session Chair : Mark Ojeda (Spansion)

The Z-axial stability analysis by contactless method and solution of probe mark shift
- ChaoWen Chiang, Chia Wei Chen, Shu Jeng Yeh, Min Chang Tu, JYUN HAO LIN, and LING CHUN FANG (WIN Semiconductors - Taipei, Taiwan)
An evalutation report of Cu-Pillar probing by using wire type probe card
- Chang-Hoon Hyun (Samsung Electronics/S.LSI Division - Yongin-City, Korea)
A Proof of Concept - Challenges of testing high-speed interface of wafer at lower cost ~ How to expand the bandwidth of the cantilever probe card ~
- Shohei Nishimura and Shinji Fujita (Sony LSI Design Inc. - Atsugi-city, Japan)
Minimizing parametric probe card stray capacitance
- Larry Levy (FormFactor - Livermore, CA, USA)
- John Cassels (IBM - Fishkill, NY, USA)

Session #8 - Cost of Ownership

Session Chair : Alan Wegleitner (Texas Instruments)

Leveraging Multiprobe Probe Card learnings to help Standardize and Improve parametric and WLR Testing
- Brandon Mair (Texas Instruments - Dallas, TX, USA)
Probe Route Optimization and its effects on the efficiency of test
- Daniel Fresquez and Ms. Rachel Koski (Texas Instruments - Dallas, TX, USA)
New prober interface docking evaluation
- Daniel Stillman (TI - Dallas, TX, USA)
Review of New, Flexible MEMS Technology to Reduce Cost of Test for Multi-site Wire Bond Applications
- Daniel Stillman (TI - Dallas, TX, USA)
- Ben Eldridge (FormFactor - Livermore, CA, USA)

Session #9 - High Volume Probe Challenges

Session Chair : Patrick Mui (JEM America)

Production Parametric, challenges and surprising outcomes running high volume manufacturing
- Karen Armendariz (Celadon Systems - Apple Valley, MN, USA)
- Frederick Huang, Greg Bottoms, Greg Tyrpak, John Reynolds (Freescale - Austin, TX, USA)
AP to LPDDR Test Probe Card
- Jung Keun Park, Young Bu Kim, Ji Sun Lee, Hyun Min Kim, Se Mi Park, and Jennifer Lee (Willtechnology - Suwon, Korea)
- Seung Ki Nam and Jung Woo Sung (Samsung - Suwon, Korea)
- Joung Ho Kim, Jong Hoon Kim, and Jin Wook Song (KAIST - Deajeon, Korea)
Optimization of Probe Capability Using Machine/Process Capability Study
- Wiljelm Carl Olalia (ON Semiconductor Philippines, Inc. - Carmona, Philippines)

Awarded Presentations

Best Overall - Experience in Applying Finite Element Analysis for Advanced Probe Card Design and Study
- Krzysztof Dabrowiecki and Jorg Behr (Feinmetall GmbH - Herrenberg, Germany)
Best Data - Probe Route Optimization and its effects on the efficiency of test
- Daniel Fresquez and Ms. Rachel Koski (Texas Instruments - Dallas, TX, USA)
Best Tutorial - An innovative design and implement of vertical probe card for High Speed Loopback (12 Gbps) Application
- Morgan Ku, Alex Wei, Seenew Lai, Akey Chen, Anderson Huang, Steven Wu, Cahris Lin (MPI Corporation - Zhubei, Taiwan) and Y.S. Kuo and Kenny Tang (TSMC Corporation - Hsinchu, Taiwan)
Most Inspirational - Determining Probe's Maximum Allowable Current
- Jarek Kister and Amy Leong (FormFactor, USA) and Amer Cassier (Qualcomm - San Diego,CA, USA)

Steering Committee Members for SW Test 2015:

Dr. Jerry Broz, Ph.D., International Test Solutions, General Chair
Rey Rincon, Freescale Semiconductor, Technical Program Chair
Maddie Harwood, CEM Inc., Finance Chair
John Caldwell, Micron Technology, Program Committee
Darren James, Rudolph Technologies, Program Committee
Jan Martens, Consultant, Program Committee
Patrick Mui, JEM America, Program Committee
Fred Taber, BiTS Workshop, Proceedings Coordinator
Karen Armendariz, Celadon Systems
Gunther Boehm, FeinMetall GmbH
Stevan Hunter, Ph.D., ON Semiconductor and Idaho State University
Michael Huebner, Ph.D., FormFactor
Tatsuo Inoue, Micronics Japan (MJC)
Amy Leong, FormFactor, Inc.
Clark Liu, Powertech Technology, Inc. (PTI)
Mark Ojeda, Spansion
Joey Wu, MPI Corporation
Al Wegleitner, Texas Instruments, Inc.

The presentations included in the SWTW proceedings reflect the authors opinions and are presented without change. Inclusion in the proceedings does not constitute an endorsement by the SouthWest Test Workshop Committee.

Papers previously copyrighted or with copyright restrictions cannot be presented. In keeping with a workshop environment and to avoid copyright issues, SWTW does not officially seek a copyright ownership / transfer from authors. Authors agree by submitting their work that their presentation is original work and substantially not published previously or copyrighted, may be referenced in the work of others, will be assembled / distributed in the SWTW Proceedings, and made available for download by anyone from the SWTW website.

SEMICONDUCTOR WAFER TEST WORKSHOP 2015

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