Schedule-At-A-Glance

Start
19:00
19:30
20:00
20:30
21:00
21:30
22:00
22:30
23:00
23:30
EXPO Carry-In/Setup
 
EXPO Carry-In/Setup from 10/23 20:00 to 23:00
 

Start
7:00
7:30
8:00
8:30
9:00
9:30
10:00
10:30
11:00
11:30
12:00
12:30
13:00
13:30
14:00
14:30
15:00
15:30
16:00
16:30
17:00
17:30
18:00
18:30
19:00
19:30
20:00
20:30

Start
7:00
7:30
8:00
8:30
9:00
9:30
10:00
10:30
11:00
11:30
12:00
12:30
13:00
13:30
14:00
14:30
15:00
15:30
16:00
16:30
17:00
17:30
18:00
18:30
19:00
19:30
20:00
20:30
21:00
21:30
Poster (Grand Foyer 1st floor)
 
Poster Session
 
Poster Session
 
Tech Showcase (Navis C 1st Floor)
 
MJC
 
Teraprobe:
 
EXPO (ARGOS C-F 1st Floor)
 
EXPO Open
EXPO Move-out
 
Japanese Street Food Festival (Olive/Garden 5th Floor)
 

Start
5:30
6:00
6:30
7:00
7:30
8:00
8:30
9:00
9:30
10:00
10:30
11:00
11:30
12:00
12:30
13:00
13:30
14:00
14:30
15:00
15:30
16:00
16:30
17:00
Charity Golf Tournament and Networking
2024 SWTest Asia Charity Golf Tournament (The Classic Golf Club)
 

Detailed Schedule

Time Event
20:00 - 23:00
EXPO Carry-In/Setup from 10/23 20:00 to 23:00

Time Event
7:30 - 9:30
EXPO Move-in
7:30 - 17:30
Attendees Registration Check-In
8:45 - 9:15
Fukuoka Governor Welcome
Jerry BROZ (SWTest Conference Chair, USA)
9:15 - 10:00
Speaker Headshot
Visionary Keynote
Silicon Seabelt 2.0: Challenges of Kyushu for Reproduction of Silicon Island
National Institute of Information - Japan
10:00 - 10:30
Break
10:00 - 10:30
Poster Session
Nyi Nyi THEIN (Western Digital Corporation , Japan)
10:00 - 17:30
EXPO Open
10:30 - 12:00
Session 1 Practical Test Solutions from MEMS, Power, and Optical
Session Chair: Eric Chia-Cheng CHANG (Intel, USA)
10:30 - 11:00
Novel True-Kelvin MEMS Analytical DC Probes to enable Accurate and Repeatable Characterization of Advanced-Node devices for AI applications
Choon Beng SIA (FormFactor Inc - Singapore), Masa WATANABE (FormFactor Japan - Japan)
Presenter HeadshotPresenter Headshot
11:00 - 11:30
Consideration of Resistance with Shared Power line for High Current device
Shoichi MATSUO (Micron Memory Japan Inc. - Japan)
Presenter Headshot
11:30 - 12:00
From Lab to Line: Enabling Efficient PIC Testing for Mass Production
Andrew YICK, Andy CHANG, Calvin YANG, Supreet KHANAPET (Marvell - USA), Christian KARRAS, Tobias GNAUSCH (Jenoptik - Germany)
Presenter Headshot
12:00 - 14:00
Lunch
14:00 - 15:30
Session 2 Innovative Testing Solutions for High-Performance Devices
Session Chair: Clark LIU (MJC Taiwan, Taiwan)
14:00 - 14:30
Addressing High-Speed Devices: Strengthening and Advancing MEMS Probe Cards
Masataka KIMOTO (MICRONICS JAPAN CO.,LTD - Japan), Yuka HOMAN (MICRONICS JAPAN CO.,LTD. - Japan), Shinji TANAKA (MICRONICS JAPAN - Japan)
Presenter HeadshotPresenter Headshot
14:30 - 15:00
A novel memory test system with an electromagnet for STT-MRAM wafer level testing
Masaharu TSUTA (Tohoku University - Japan), Masatomo TAKAHASHI (Accretech - Japan)
Presenter Headshot
15:00 - 15:30
100+K Ultra HIGH Pin Count Probe Card
Zach HSIEH (MPI Corporation - Taiwan)
Presenter Headshot
15:30 - 16:00
Break
15:30 - 16:00
Poster Session
Nyi Nyi THEIN (Western Digital Corporation , Japan)
16:00 - 17:30
Session 3 Challenges of Advanced Devices and Complex Systems
Session Chair: Alan FERGUSON (Oxford Lasers, United Kingdom)
16:00 - 16:30
A Cost-Effective Test Solution for Parametric Test & Reliability Lab
Adam KONICEK (Celadon Systems, Inc. - USA), Ching Too CHEN, Jeff GRUSZYNSKI, Chintankumar PATEL, Jocelyn HSIEH, Jonathon LEE (Chroma ATE, Inc. - USA)
Presenter HeadshotPresenter HeadshotPresenter Headshot
16:30 - 17:00
Automated Test Equipment for Battery Management Systems: Challenges and Solutions
Sandeep D'SOUZA (Elevate Semiconductor - USA)
Presenter Headshot
17:00 - 17:30
Probing challenge New MEMS probe design to control probe creep/fatigue for high temp probing.
Hiroki KITAMURA, Tomonao NAKASHIMA (Japan Electronic Material Corp - Japan)
Presenter HeadshotPresenter Headshot
17:30 - 20:00
Kagamiwari Ceremony & Welcome Reception

Poster Sessions

Poster Session

Session Chair: Nyi Nyi THEIN (Western Digital Corporation , Japan)
  • Advanced DUT protection during Avalanche testing on wafer level
    Ondrej BETAK, Zdenek SIMERSKY (UNITES Systems a.s. - Czech Republic)
  • More effective high voltage(1,000V) parametric test technique with MEMS probe card
    Takao SAEKI (FormFactor Inc - Japan)
  • New Cleaning Sheet filled with abrasive gel in all cells of melamine sponge.
    Tad ROKKAKU (Probe Innovation USA, LLC - USA)
  • Towards Ultra-High Pin Count Probe Card for high end logic devices
    Alice GHIDONI, Elia MISSAGLIA (Technoprobe Spa - Italy)
  • Adjusting Device Temperature Measurement using a Thermocouple Probe Card
    Hiroyuki NAKAMURA (Nidec SV Probe - Japan)
  • Power supply characteristics of Printed Wiring Boards for low-voltage, high-speed device testing
    Wai Kit K (Lincstech Co., Ltd. - Japan)
  • Enhancing High-Density Semiconductor Testing with Dual-Head Laser Micro Bonding and Vacuum Gripper Technology
    Gi Jung NAM, HONG CHUL KIM (DAWON NEXVIEW - South Korea)
  • A Comprehensive Study on Improving Probe Card Transmission Lines for Effective High-Frequency Wafer-Level Testing
    Alessia GALLI, Dario VILLA (Technoprobe - Italy)
  • New Flying Probe Tester for Probe Cards
    Koichi ANDO (HIOKI E.E. CORPORATION - Japan)
  • Development of low CTE LTCC material for ST substrates
    Takahisa YAMAGUCHI, Eiichi NAKAMURA, Noriyuki YOSHIDA, Shigekatsu KONO (Nippon Electric Glass Co.,Ltd. - Japan)
  • Introduction of precious metal alloy for Probe-pins materials and mechanical properties of Cu-Ag alloy that product name called TK-101.
    Tetsuya KATO, Suganuma RYOSUKE, Takada KAZUYASU (TANAKA KIKINZOKU KOGYO K.K. - Japan)
  • Testing AI chips and KGD at wafer-level: A new approach for full content test in wafer probing
    Klemens REITINGER (ERS electronic GmbH - Germany)
  • Productivity Enhancements when Drilling Guide Plates for Advanced Vertical Probe Cards - A Comparison between Nanosecond, Picosecond and Femtosecond Pulsed Lasers
    Alan FERGUSON, Chris STOKES (Oxford Lasers - United Kingdom)
  • ATE Spring Pin to DUT Board Via Interconnect: Myths and Challenges
    Jose MOREIRA (Advantest - Germany)
  • Wafer test with simultaneous stimulation of sensor devices
    Georg FRANZ (T.I.P.S. Messtechnik GmbH - Austria)
  • Process for Integrating MLOs Manufactured on Digital Lithography Systems
    Ksenija VARGA, R HOLLY, T UHRMANN, T ZENGER (EV Group - Austria), C LEE, Y KUO (EV Group - Taiwan), C WANG, H CHANG, L CHANG, T YANG (ITRI Industrial Technology Research Institute - Taiwan), D JANSSEN, M REYBROUCK, M VANDEVYVERE, N VAN HERCK, S VANCLOOSTER (FUJIFILM Electronic Materials (Europe) - Belgium)
  • Hybrid Bonding Technology for Next-Generation 3D-IC/Chiplets
    Takafumi FUKUSHIMA, Fukushima TAKAFUMI (Tohoku University - Japan)
  • 3D-IC Fabrication with TSV at the die level from 2D-IC
    Jiayi SHEN, Jlayi SHEN (Tohoku University - Japan)
  • Robust Classifications of WBM Defect Patterns -Multimodal approach 
    Taiki AI, Daisuke TAKADA, Koichi SUMIYA, Sumika ARIMA, Taiki ITO, Takumi MAEDA (University of Tsukuba - Japan)
  • Interaction Modeling of High-dimensional Data with the Bias and High Correlation -Sparse Factorization Machines Approach.
    Haruki OZAWA, Sara HOSHINO, Sumika ARIMA, Sumika WATANABE, Taiki ITO, Takuya MATSUZAWA (University of Tsukuba - Japan)

Poster Session

Session Chair: Nyi Nyi THEIN (Western Digital Corporation , Japan)

    Time Event
    7:30 - 17:00
    Attendees Registration Check-In
    8:45 - 9:00
    Friday Overview
    Jerry BROZ (SWTest Conference Chair, USA)
    9:00 - 9:30
    Speaker Headshot
    Keynote Speaker
    Critical Role of Test for Image Sensor Development
    Sony Corporation - Japan
    9:30 - 10:00
    Speaker Headshot
    Keynote Speaker
    New Wafer Testing Challenges for Leading-Edge SoC Products
    Socionext Inc. - Japan
    10:00 - 10:30
    Break
    10:00 - 10:30
    Poster Session
    Nyi Nyi THEIN (Western Digital Corporation , Japan)
    10:00 - 16:00
    EXPO Open
    10:30 - 12:00
    Session 4 Advancing Wafer Probing Efficiency and Quality
    Session Chair: Masatomo TAKAHASHI (Accretech, Japan)
    10:30 - 11:00
    Quantum Computing IC Die Level Test Solution at mK-temperature Environment
    Alan LIAO (FormFactor - USA), Takuji MIKI (Kobe University - Japan)
    Presenter HeadshotPresenter Headshot
    11:00 - 11:30
    Cleaning Innovations to Maximize OEE for High Volume Memory Test
    Victoria TRAN (Gel-Pak - USA), Tomonao NAKASHIMA (Japan Electronic Material Corp - Japan)
    Presenter Headshot
    11:30 - 12:00
    Improvement of probe-to-wafer contact resistance for inline automated testing for different technologies
    Anton GAVRILOV, Geert GOUWY, Van Dievel MARC, Vercaigne GREGOR (Imec - Belgium)
    Presenter Headshot
    12:00 - 14:00
    Lunch
    14:00 - 15:30
    Session 5 High-Speed KGD and Power Module Testing Challenges
    Session Chair: Alex YANG (MPI Corporation, Taiwan)
    14:00 - 14:30
    “Challenges and Solutions in Wafer Testing” from the Perspective of Power Semiconductor Back-End Processes and Modules
    Kai SUZUKI, Masashi HOSHINO, Nobuyuki TOYODA (TESEC Corporation - Japan), Kiyotaka YAMANISHI, Masatomo TAKAHASHI, Naoya TAKEUCHI (Accretech - Japan), Noriyuki IWAMURO (University of Tsukuba - Japan)
    Presenter Headshot